At a fixed board size, if the design need to accommodate more functionality, they often need to increase the density of PCB traces, but this can lead to mutual interference traces enhanced while the traces are too small to make impedance can not be reduced, may I ask what skill at high speed (> 100MHz) high density PCB design?

in the high-speed high-density PCB design, the crosstalk (crosstalkinterference) really should pay special attention because of its timing (timing) and signal integrity sex (signalintegrity) has a great influence. Here are a few caveats: 1. Continuous control go and match the characteristic impedance of the line. 2. trace spacing size. General often see a pitch twice the width. Can Through simulation to know trace spacing on timing and signal integrity, and to find the minimum distance can be tolerated. Results of different signals may be different chips. 3. Select the appropriate termination method. 4. Avoid vertically adjacent layers of the same alignment direction, even just walking up and down the line overlap together, because this case crosstalk traces larger than the layer adjacent to the same. 5. The use of blind and buried vias (blind / buriedvia) to increase the alignment area. However, pcb board production costs will increase. In the actual implementation does not perfectly parallel to the same length, but still want to try to do. In addition, you can reserve a differential and common mode termination termination, to ease the impact on the timing and signal integrity.

i worked in pcbgogo,is a chinese Custom PCB Prototype Manufacturer, and  our factory's Site Engineer told me  more about pcbs design  .so there i'd like to share with you .